Design and implementation of FPGA-based adaptive dynamic traffic light controller

Author

Singh, Sushil ; Badwaik, S.C.

Author_Institution

Dept. of Electron. & Telecommun., Sinhgad Coll. of Eng., Pune, India

fYear

2011

fDate

22-24 April 2011

Firstpage

324

Lastpage

330

Abstract

This paper deals with more efficient and effective way of handling the random and busy traffic pattern on Indian roads. The purpose of this paper is to flush out the concept of nondynamic traffic light controller TLC (with fixed counters irrespective of traffic intensity) existing in INDIA and other developing nations. This AD-TLC concept will save time and will smoothen the traffic flow by avoiding heavy rush in this densely populated country. The proposed TLC is more appropriate as road selection has been suitably prioritized on the basis of traffic intensity. The AD-TLC is designed using FSM with 32 states including a total of 255 possible combinations of active sensors. The design has been deployed in FPGA.

Keywords

field programmable gate arrays; finite state machines; infrared detectors; microcontrollers; random processes; road traffic; traffic engineering computing; AD-TLC; FPGA; FSM; Indian roads; TLC; active sensor; adaptive dynamic traffic light controller; busy traffic pattern; nondynamic traffic light controller; random traffic pattern; traffic intensity; Adders; Field programmable gate arrays; Multiplexing; Radiation detectors; Registers; Roads; AD-TLC: Adaptive Dynamic Traffic Light Controller; FPGA; FSM: Finite State Machine; Field Programmable Gate Array;

fLanguage

English

Publisher

ieee

Conference_Titel

Emerging Trends in Networks and Computer Communications (ETNCC), 2011 International Conference on

Conference_Location

Udaipur

Print_ISBN

978-1-4577-0239-6

Type

conf

DOI

10.1109/ETNCC.2011.6255914

Filename

6255914