An 8mW ultra low power 60GHz direct-conversion receiver with 55dB gain and 4.9dB noise figure in 65nm CMOS

Author

Yang Shang ; Deyun Cai ; Wei Fei ; Hao Yu ; Junyan Ren

Author_Institution

Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore

fYear

2012

fDate

21-23 Nov. 2012

Firstpage

47

Lastpage

49

Abstract

An ultra low power direct-conversion receiver is demonstrated for V-band 60GHz applications in 65nm CMOS process. The power consumption is significantly reduced by the design of low-power low noise amplifier (LNA), transconductance mixer and variable gain amplifier (VGA). A compact quadrature-hybrid coupler is developed for transconductance mixer for the reduction of both power and area. The proposed receiver (0.34mm² chip area) is measured with 8mW power, the minimum single-side-band (SSB) noise figure (NF) of 4.9dB, and the maximum power conversion gain of 55dB.

Keywords

CMOS integrated circuits; low noise amplifiers; low-power electronics; mixers (circuits); power consumption; CMOS process; LNA; V-band applications; VGA; frequency 60 GHz; gain 55 dB; low-power low noise amplifier; noise figure 4.9 dB; power 8 mW; power consumption; size 65 nm; transconductance mixer; ultra low power direct-conversion receiver; variable gain amplifier; CMOS integrated circuits; Couplers; Low-power electronics; Mixers; Noise measurement; Receivers; Transconductance; 60GHz receiver; CMOS 65nm; ultra low power;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio-Frequency Integration Technology (RFIT), 2012 IEEE International Symposium on

Conference_Location

Singapore

Print_ISBN

978-1-4673-2303-1

Type

conf

DOI

10.1109/RFIT.2012.6401609

Filename

6401609