DocumentCode
2813476
Title
Fault Detection in NanoICs
Author
Lee, Samuel C. ; Nguyen, Thanh X.
Author_Institution
Univ. of Oklahoma, Norman
fYear
2007
fDate
22-26 April 2007
Firstpage
1306
Lastpage
1308
Abstract
Since nanolCs are very noise sensitive and non-reliable in nature, in the logic design of nanolCs, a fault detection method must be included as an essential requirement in the design and manufacturing process to ensure that the nanolC will function normally as expected. The logic design model of the nanolC used in this paper is the N-hypercube.The fault types considered are transition faults occurring at terminal nodes of the N-hypercube: 0*1 and 1*0, denoted by f0*1 and f1*0, respectively. This paper presents a fault detection method using the Boolean difference, which can not only derive tests for testing the above mentioned transition faults at any terminal node of the hypercube but also generate a complete minimum test set for detecting any f0*1 and f1*0 faults in the nanolC. An example is given to illustrate the method.
Keywords
fault diagnosis; hypercube networks; integrated circuit design; integrated circuit manufacture; logic design; nanotechnology; Boolean difference; N-hypercube; fault detection method; logic design; nanolCs; Circuit faults; Combinational circuits; Electrical fault detection; Fault detection; Hypercubes; Logic design; Logic gates; Manufacturing processes; Process design; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 2007. CCECE 2007. Canadian Conference on
Conference_Location
Vancouver, BC
ISSN
0840-7789
Print_ISBN
1-4244-1020-7
Electronic_ISBN
0840-7789
Type
conf
DOI
10.1109/CCECE.2007.332
Filename
4232991
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