• DocumentCode
    2814839
  • Title

    Using Keeper Control and Body Bias for Fine Grained Threshold Voltage Compensation in Dynamic Logic

  • Author

    Azizi, Navid ; Najm, Farid N.

  • Author_Institution
    Univ. of Toronto, Toronto
  • fYear
    2007
  • fDate
    22-26 April 2007
  • Firstpage
    1639
  • Lastpage
    1644
  • Abstract
    We propose a novel fine-grained scheme to compensate for within-die variations in dynamic logic to reduce the variation in leakage, delay and noise margin using both keeper control and body-biasing. We first show that the amount of compensation needed depends on the correlation that exists between gates, and then analytically show the possible reduction in the variance of the leakage and delay of both a single and multiple dynamic logic gates. We then design circuits to implement the system which provides the reduction in the variance of the leakage, delay and noise margin of dynamic logic gates and show that it produces a close match to the analytical results. In one design the variance of the leakage of 169 gates is reduced by 27% and the variance of the path delay is reduced by 39%.
  • Keywords
    logic circuits; logic design; logic gates; threshold logic; body bias; circuit design; dynamic logic gates; fine grained threshold voltage compensation; keeper control; Adaptive control; Analysis of variance; Circuit noise; Delay; Logic circuits; Logic gates; Noise reduction; Programmable control; Threshold voltage; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical and Computer Engineering, 2007. CCECE 2007. Canadian Conference on
  • Conference_Location
    Vancouver, BC
  • ISSN
    0840-7789
  • Print_ISBN
    1-4244-1020-7
  • Electronic_ISBN
    0840-7789
  • Type

    conf

  • DOI
    10.1109/CCECE.2007.410
  • Filename
    4233069