An Extreme Low Power Galois Field Inversion Circuit

This paper describes a low power circuit to implement an inversion of an element in a Galois field. Low voltage, low current AND and XOR gates are designed and used as standard cells. The cells are put together in a parallel structure to increase inversion speed. The power consumption is less than 1% compared to the circuit implemented using conventional digital cells. Operation frequency is used to trade-off for power consumption. Inversion circuit for higher degrees in GF can be implemented with ease using these standard cells.