Predicting execution time of relay ladder logic for programmable logic controllers

This paper presents a technique of calculating the worst-case execution time of PLC application programs written in relay ladder logic. The concept of generic PLC and RLL block is introduced to develop a system-independent prediction algorithm. The technique divides an RLL program into several RLL blocks and then transforms them into Boolean logic equations. The internal states of an RLL program is analyzed and their dependencies are used as constraints when we solve the Boolean logic equations. Since the time for solving Boolean logic equations increases exponentially as the number of independent variable increases, the algorithm for partitioning variables in the Boolean logic equations is also developed