Title :
A 2.5 Gbit/s GaAs clock and data regenerator IC
Author :
Ransijn, H. ; O´Connor, P.
Author_Institution :
AT&T Bell Lab., Reading, PA, USA
Abstract :
Monolithic integration of a clock and data regenerator operating at 2.5 Gbit/s has been achieved using analog design techniques applied to a GaAs heterojunction FET (HFET) process. The GaAs IC, which performs clock and data regeneration functions for high-speed fiber-optic transmission systems, is presented. This IC, in conjunction with a companion Si bipolar circuit, can regenerate pseudorandom NRZ data error-free at rates exceeding 2.5 Gbit/s with a sensitivity of 25 mV. The recovered clock has less than 7-ps RMS edge jitter. The chip draws 250 mA from a single 5.2 V ECL-compatible power supply.<>
Keywords :
III-V semiconductors; amplifiers; application specific integrated circuits; clocks; field effect integrated circuits; gallium arsenide; optical communication equipment; -5.2 V; 2.5 Gbit/s; 25 mV; 250 mA; ECL-compatible power supply; GaAs; HFET; Si bipolar circuit; analog design techniques; clock and data regenerator IC; clock recovery; fiber-optic transmission systems; heterojunction FET; jitter; recovered clock; regenerate pseudorandom NRZ data; semiconductors; Analog integrated circuits; Bipolar integrated circuits; Clocks; FET integrated circuits; Gallium arsenide; HEMTs; Heterojunctions; High speed integrated circuits; MODFETs; Monolithic integrated circuits;
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1990. Technical Digest 1990., 12th Annual
Conference_Location :
New Orleans, LA, USA
DOI :
10.1109/GAAS.1990.175447
