DocumentCode
2816185
Title
A hybrid number system and its application in FPGA-DSP technology
Author
Reza ; Hashemian ; Sreedharan, B.
Author_Institution
Dept. of Electr. Eng., Northern Illinois Univ., DeKalb, IL, USA
Volume
2
fYear
2004
fDate
5-7 April 2004
Firstpage
342
Abstract
New advancement in FPGA-DSP technology demands a new number system as well as a new data treatment that best utilizes the strengths and avoid the shortcomings of the new technology. To achieve this goal, here we introduce a customized floating-point number system that it can be reformatted as a fixed-point number when needed. In addition, a scheme is proposed for the use of both formats in DSP applications, such as in digital filter design.
Keywords
digital filters; field programmable gate arrays; floating point arithmetic; FPGA-DSP technology; digital filter design; fixed-point number; floating-point number system; hybrid number system; Costs; Digital filters; Digital signal processing; Digital systems; Dynamic range; Field programmable gate arrays; Finite wordlength effects; Fixed-point arithmetic; Floating-point arithmetic; Hardware;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Technology: Coding and Computing, 2004. Proceedings. ITCC 2004. International Conference on
Print_ISBN
0-7695-2108-8
Type
conf
DOI
10.1109/ITCC.2004.1286659
Filename
1286659
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