• DocumentCode
    2816414
  • Title

    A new interfacing method ´SCFL-interfacing´ is proposed for ultra-high-speed logic ICs

  • Author

    Takada, T. ; Ohtsuka, H. ; Ohhata, M.

  • Author_Institution
    NTT Electronics Technol. Corp., Kanagawa, Japan
  • fYear
    1990
  • fDate
    7-10 Oct. 1990
  • Firstpage
    211
  • Lastpage
    214
  • Abstract
    A new I/O interfacing method called ´SCFL-interfacing´ as a standard interfacing for ultra-high speed logic ICs. The purpose is to avoid the waveform degradation and further difficulties inherent in conventional ECL-interfacing when operating above 1 Gb/s. Characteristics of the proposed method include: (1) high and log I/O levels of typically 0.0 V and -0.9 V, respectively; (2) on-chip 59 ohm resistors as receiving-end terminators; and (3) signal distributor ICs for multi-fanout connections. The authors strongly believe that SCFL-interfacing is highly effective for ICs operating above 10 Gbit/s. However, as a first step, to insure compatibility with conventional ICs, they developed an 8 Gb/s GaAs standard logic IC family using a modified SCFL-interfacing in which both SCFL and ECL interfaces are available.<>
  • Keywords
    III-V semiconductors; gallium arsenide; integrated logic circuits; monolithic integrated circuits; 8 Gbit/s; GaAs; I/O interfacing; SCFL-interfacing; interfacing method; multi-fanout connections; receiving-end terminators; signal distributor ICs; standard logic IC family; ultra-high-speed logic ICs; waveform degradation; Assembly; Degradation; Gallium arsenide; Integrated circuit packaging; Inverters; Laboratories; Large scale integration; Logic; Resistors; Standards development;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1990. Technical Digest 1990., 12th Annual
  • Conference_Location
    New Orleans, LA, USA
  • Type

    conf

  • DOI
    10.1109/GAAS.1990.175489
  • Filename
    175489