FET-FET logic: a high performance, high noise margin E/D logic family

A new logic family, FFL (FET-FET logic), is reported which combines a low leaded delay-power product with good noise margin. It has many desirable attributes for GaAs VLSI circuits. Measurements of FFL and six other logic families in enhancement/depletion MESFET technology are compared for speed, power, and noise margin and show the advantages of using FFL for many applications. FFL requires only a single 2-V power supply, performs single-ended complex logic functions, and can operate reliably over the military temperature range.<>