DocumentCode :
2816554
Title :
A novel self-aligned gate process for GaAs LSI using ECR-CVD
Author :
Shikata, S. ; Sawada, S. ; Tsuchimoto, J. ; Hayashi, H.
Author_Institution :
Sumitomo Electric Ind. Ltd., Yokohama, Japan
fYear :
1990
fDate :
7-10 Oct. 1990
Firstpage :
257
Lastpage :
260
Abstract :
A novel substitutional self-aligned gate process for the GaAs LSI has been successfully developed utilizing ECR (electron cyclotron resonance) CVD (chemical vapor deposition). The high performance BP-LDD (BP-lightly doped drain) structure FET is obtained with sidewall formation and precise pattern reverse process using a photoresist dummy gate. A maximum transconductance of 440 mS/mm and a cutoff frequency of 39 GHz are obtained for a 0.45- mu m gate length FET. This new process is demonstrated by the preliminary fabrication of a 16-bit*16-bit E/D DCFL (enhancement/depletion directly coupled FET logic) multiplier using 0.65- mu m FETs with trilevel interconnection lines in which the top layer is an air bridge. A 4.3-ns multiplication time is observed at 5.5-W total power dissipation, which makes the fastest 16-bit*16-bit multiplier for GaAs MESFETs.<>
Keywords :
III-V semiconductors; Schottky gate field effect transistors; chemical vapour deposition; digital arithmetic; field effect integrated circuits; gallium arsenide; integrated circuit technology; integrated logic circuits; large scale integration; multiplying circuits; 0.45 micron; 0.65 micron; 39 GHz; 440 mS; 5.5 W; DCFL; ECR-CVD; GaAs; LDD FET; LSI; MESFETs; air bridge; buried p-layer; chemical vapor deposition; cutoff frequency; directly coupled FET logic; electron cyclotron resonance; enhancement/depletion; fabrication; lightly doped drain; maximum transconductance; multiplier; pattern reverse process; photoresist dummy gate; self-aligned gate process; sidewall formation; trilevel interconnection lines; Chemical vapor deposition; Cutoff frequency; Cyclotrons; Electrons; FETs; Gallium arsenide; Large scale integration; Resists; Resonance; Transconductance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1990. Technical Digest 1990., 12th Annual
Conference_Location :
New Orleans, LA, USA
Type :
conf
DOI :
10.1109/GAAS.1990.175501
Filename :
175501
Link To Document :
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