Title :
Topology-related upset mechanisms in design hardened storage cells
Author :
Calin, T. ; Velazco, R. ; Nicolaidis, M. ; Moss, S. ; LaLumondiere, S.D. ; Tran, V.T. ; Koga, R. ; Clark, K.
Author_Institution :
TIMA Lab., Grenoble, France
Abstract :
The SEU hardness of a new CMOS storage cell based on latch redundancy has been analyzed using a laser beam simulation. We detected and investigated topology-dependent upset mechanisms due to charge collection at two sensitive nodes using a laser excitation between the nodes. Compact upset-immune device topologies are proposed, using spacing and isolation techniques for simultaneously sensitive node pairs, to achieve high immunity levels required in critical applications
Keywords :
CMOS memory circuits; integrated circuit design; laser beam effects; network topology; radiation hardening (electronics); redundancy; CMOS storage cell; SEU hardness; charge collection; design; device topology; isolation; laser beam simulation; latch redundancy; single event upset; spacing; CMOS technology; Circuit testing; Integrated circuit interconnections; Laser excitation; Latches; Logic design; Logic devices; Prototypes; Quantum cascade lasers; Single event upset;
Conference_Titel :
Radiation and Its Effects on Components and Systems, 1997. RADECS 97. Fourth European Conference on
Conference_Location :
Cannes
Print_ISBN :
0-7803-4071-X
DOI :
10.1109/RADECS.1997.698979
