DocumentCode :
2817766
Title :
Three-phase three-level boost for UPS applications using FPGA
Author :
Câmara, R. A da ; Praça, P.P. ; Cruz, C.M.T. ; Torrico-Bascopé, R.P.
Author_Institution :
Univ. Fed. Rural do Semi-Arido, Mossoro, Brazil
fYear :
2010
fDate :
8-10 Nov. 2010
Firstpage :
1
Lastpage :
7
Abstract :
This paper presents a three-phase three-level boost for Uninterruptible Power Supply (UPS) applications using FPGA. Its main features are: high power factor, reduced conduction losses, weight and volume, simple control strategy based on One-cycle Control (OCC), and connection between input and output enabling the use of inverter and bypass. A theoretical analysis, simulation results and preliminaries experimental results from a 9kW development stage lab model are presented.
Keywords :
field programmable gate arrays; power convertors; uninterruptible power supplies; FPGA; UPS applications; conduction losses; one-cycle control; power 9 kW; three-phase three-level boost; uninterruptible power supply; Clocks; Converters; Field programmable gate arrays; Rectifiers; Topology; Uninterruptible power systems; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industry Applications (INDUSCON), 2010 9th IEEE/IAS International Conference on
Conference_Location :
Sao Paulo
Print_ISBN :
978-1-4244-8008-1
Electronic_ISBN :
978-1-4244-8009-8
Type :
conf
DOI :
10.1109/INDUSCON.2010.5740010
Filename :
5740010
Link To Document :
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