InP in HBTs by vertical and lateral wet etching

We present a study of the vertical and lateral etching of InP with the mask sides parallel to the [0,0,1] and [0,1,0] crystal orientations using HCl:H₃PO₄-based solutions. This etch is used to fabricate self-aligned emitter-up and collector-up HBT structures with reduced parasitic resistances and capacitances. The techniques presented are also applicable to double-heterojunction HBTs. The etch rate, homogeneity and surface quality are presented as a function of HCl concentration and solution temperature. The present etching technique was used to fabricate fully self-aligned emitter-up and collector-up InP/InGaAs HBTs. The minimum distance between the base contact and the emitter active area for self-aligned emitter-up HBTs is <0.3 μm. In collector-up HBTs, emitter widths as small as 0.5 μm were formed by lateral etching with a relative area fluctuation less than 10%