Current-mode multiple valued logic circuit by merged Bi-CMOS transistors

Author

Ueno, Fumio ; Inoue, Takahiro ; Taniguchi, Kazutaka ; Yamashita, Toshitsugu

Author_Institution

Dept. of Inf. Eng., Kumamoto Univ., Japan

fYear

1990

fDate

12-14 Aug 1990

Firstpage

877

Abstract

The authors present a current-mode multiple-valued logic circuit by merged Bi-CMOS transistors. This circuit is composed of a current mirror, threshold detector, and current source. The circuit has the advantages of high accuracy, high density, and high speed, making it possible to realize high-radix multiple-valued logic circuits. As an application of the proposed circuit, a parallel counter is presented. This circuit operates with higher speed than conventional circuits, so it is useful for the parallel counter-type multiplier. Circuit simulation for the proposed circuit has been performed using the SPICE2 program

Keywords

BIMOS integrated circuits; many-valued logics; multiplying circuits; BiCMOS; SPICE2 program; accuracy; counter-type multiplier; current mirror; current source; current-mode multiple-valued logic circuit; density; high-radix multiple-valued logic circuits; merged Bi-CMOS transistors; parallel counter; parallel multipliers; speed; threshold detector; CMOS logic circuits; Circuit simulation; Counting circuits; Detectors; Logic circuits; Mirrors; Modulation coding; Multivalued logic; Performance gain; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1990., Proceedings of the 33rd Midwest Symposium on

Conference_Location

Calgary, Alta.

Print_ISBN

0-7803-0081-5

Type

conf

DOI

10.1109/MWSCAS.1990.140861

Filename

140861