DocumentCode :
2818500
Title :
The effect of switch speed, and buffer limitations on the performance of a multichannel ATM switch with output queueing
Author :
Lin, Arthur Y M ; Silvester, John A.
Author_Institution :
Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
fYear :
1990
fDate :
3-6 Sep 1990
Firstpage :
483
Lastpage :
487
Abstract :
The authors present a queuing analysis of an internally nonblocking N×N ATM (asynchronous transfer mode) switch employing multichannel transmission groups with partially shared output buffers. The analysis is based on a discrete-time D[A]/D/c/B queuing model. Bulk input traffic with constant bulk interarrival time (D) and general bulk-size distribution (A) is considered. The impact of switch speedup on the performance is explicitly taken into account. It is found that the switch speedup required to approach the ideal performance, obtained by having the switch fabric run N times as fast as the input and output channels, is small compared with N . This makes the practical realization of the proposed switch architecture feasible
Keywords :
electronic switching systems; queueing theory; time division multiplexing; B-ISDN; asynchronous transfer mode; buffer limitations; bulk input traffic; constant bulk interarrival time; discrete time queueing model; general bulk-size distribution; multichannel ATM switch; multichannel transmission groups; nonblocking switch; output queueing; queuing analysis; switch architecture; switch speed; Asynchronous transfer mode; B-ISDN; Communication switching; Communication system traffic control; Delay; Fabrics; Performance analysis; Queueing analysis; Switches; Traffic control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Telecommunications Symposium, 1990. ITS '90 Symposium Record., SBT/IEEE International
Conference_Location :
Rio de Janeiro
Type :
conf
DOI :
10.1109/ITS.1990.175652
Filename :
175652
Link To Document :
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