Title :
Syndrome based check node processing of high order NB-LDPC decoders
Author :
Schlafer, Philipp ; Wehn, Norbert ; Alles, Matthias ; Lehnigk-Emden, Timo ; Boutillon, Emmanuel
Author_Institution :
Microelectron. Syst. Design Res. Group, Univ. of Kaiserslautern, Kaiserslautern, Germany
Abstract :
Non-binary low-density parity-check codes have superior communications performance compared to their binary counterparts. However, to be an option for future standards, efficient hardware architectures must be developed. State-of-the-art decoding algorithms lead to architectures suffering from low throughput and high latency. The check node function accounts for the largest part of the decoders overall complexity. In this paper a new, hardware aware check node algorithm is proposed. It has state-of-the-art communications performance while reducing the decoding complexity. Moreover the presented algorithm allows for partially or even fully parallel processing of the check node operations which is not applicable with currently used algorithms. It is therefore an excellent candidate for future high throughput hardware implementations.
Keywords :
parity check codes; check node operations; hardware aware check node algorithm; high order NB-LDPC decoders; nonbinary low-density parity-check codes; parallel processing; syndrome based check node processing; Complexity theory; Decoding; Decorrelation; Hardware; Parity check codes; Reliability; Sorting;
Conference_Titel :
Telecommunications (ICT), 2015 22nd International Conference on
Conference_Location :
Sydney, NSW
DOI :
10.1109/ICT.2015.7124675