• DocumentCode
    2819053
  • Title

    An ontology and constraint based approach to cache preloading

  • Author

    Bhatia, Rajiv ; Bin, Eyal ; Marcus, Eitan ; Shurek, Gil

  • Author_Institution
    IBM Syst. & Technol. Group, Austin, TX, USA
  • fYear
    2010
  • fDate
    10-12 June 2010
  • Firstpage
    129
  • Lastpage
    136
  • Abstract
    The verification of modern microprocessor-based systems requires stressing the cache hierarchy and effectively covering its huge state space. Cache hierarchy initialization (or preloading) is a technique that enables simulation to start from a rich, complex system-level setup, thereby simplifying the task of dynamically driving the hierarchy into the required corner cases. In this paper we introduce CacheLoader, a new, design-independent cache-preloading technology. The tool´s architecture follows the principles of ontology-based software to achieve complete separation between the cache-preloading engine and design dependent knowledge. Constraint satisfaction techniques are used to generate valid, interesting system initialization, and to satisfy explicit user directives. CacheLoader is currently being used by verification teams of several large scale designs in IBM. Results show that this technique provides superior coverage and user controllability, speeds up the construction of mature verification environments, simplifies maintenance, encourages encapsulation of domain knowledge, and enables reuse across verification environments and cache hierarchy designs.
  • Keywords
    cache storage; constraint theory; formal verification; microprocessor chips; ontologies (artificial intelligence); IBM; cache hierarchy; cache preloading technology; constraint satisfaction techniques; formal verification; large scale designs; microprocessor based systems; ontology; Access protocols; Computer architecture; Control systems; Controllability; Encapsulation; Engines; Gas insulated transmission lines; Memory management; Ontologies; Software tools;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Level Design Validation and Test Workshop (HLDVT), 2010 IEEE International
  • Conference_Location
    Anaheim, FL
  • ISSN
    1552-6674
  • Print_ISBN
    978-1-4244-7805-7
  • Type

    conf

  • DOI
    10.1109/HLDVT.2010.5496651
  • Filename
    5496651