DocumentCode
2819148
Title
A new architecture for branch-intensive loops
Author
Tang, Zhizhong ; Zhang, Chihong ; Lv, Sifei ; Yu, Tao
Author_Institution
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
fYear
1997
fDate
19-21 Mar 1997
Firstpage
241
Lastpage
246
Abstract
A new VLIW architecture, called GPMB (Global Pipelining of Multi-Branch), is discussed in this paper. The GPMB architecture can handle branch-intensive programs efficiently. With the concept of next address function, GPMB regards branching as correctly calculating the next address. The next address function is implemented by hardware and software in GPMB. A brief description of GPMB and a detailed example are included. A comparison with other architectures is also presented in this paper
Keywords
parallel architectures; pipeline processing; GPMB; Global Pipelining of Multi-Branch; VLIW architecture; branch-intensive loops; next address function; Application software; Computer architecture; Computer science; Flow graphs; Hardware; Optimizing compilers; Pipeline processing; Processor scheduling; Software algorithms; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
Advances in Parallel and Distributed Computing, 1997. Proceedings
Conference_Location
Shanghai
Print_ISBN
0-8186-7876-3
Type
conf
DOI
10.1109/APDC.1997.574039
Filename
574039
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