Title :
Sigma delta ADC design using Verilog-A
Author :
Mannozzi, F. ; Tinfena, F. ; Fanucci, L.
Author_Institution :
Dipt. di Ingegneria dell´´Informazione, Pisa Univ.
Abstract :
Electrical simulation gives a good evaluation of the performances of sigma-delta modulators but could require too long simulation times. In this paper we introduce the use of Verilog-A, which provides the capability to model the circuit topology of sigma-delta modulators closely to the electrical level and achieving a considerable reduction of simulation time
Keywords :
integrated circuit design; network topology; sigma-delta modulation; Verilog-A; analog-digital converter; circuit topology; electrical simulation; sigma delta ADC design; sigma-delta modulator; Analytical models; Circuit noise; Circuit simulation; Circuit topology; Delta-sigma modulation; Hardware design languages; Integrated circuit interconnections; Noise shaping; Performance analysis; Performance evaluation;
Conference_Titel :
Circuits and Systems, 2003 IEEE 46th Midwest Symposium on
Conference_Location :
Cairo
Print_ISBN :
0-7803-8294-3
DOI :
10.1109/MWSCAS.2003.1562217
