DocumentCode
2819815
Title
A prototype 210-MHz sub-sampling bandpass sigma-delta modulator
Author
Su, Zhenjiang ; Xu, Yong Ping ; Rana, Ram Singh
Author_Institution
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore
Volume
1
fYear
2003
fDate
27-30 Dec. 2003
Firstpage
174
Abstract
A prototype 210-MHz CMOS sub-sampling bandpass sigma-delta modulator is presented. The modulator consists of a sub-sampling stage and a fourth-order switch-capacitor bandpass sigma-delta modulator. The chip is fabricated in a 0.6-μm CMOS process. The test result has shown that when sampled at 40MHz, the modulator has a dynamic range of 42 dB over 200-kHz bandwidth centered at 10MHz and a maximum SNR of 30dB.
Keywords
CMOS integrated circuits; VHF filters; band-pass filters; sigma-delta modulation; switched capacitor filters; 0.6 micron; 200 kHz; 210 MHz; 40 MHz; CMOS process; bandpass sigma-delta modulator; dynamic range; fourth order switched capacitor circuit; Bandwidth; Clocks; Delta-sigma modulation; Digital modulation; Frequency; Image sampling; Prototypes; Sampling methods; Signal generators; Signal sampling; IF sampling; bandpass; sigma-delta modulator; sub-sampling;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003 IEEE 46th Midwest Symposium on
ISSN
1548-3746
Print_ISBN
0-7803-8294-3
Type
conf
DOI
10.1109/MWSCAS.2003.1562246
Filename
1562246
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