Monolithically-Integrated Digital Circuits with Light Emitting Diodes in Lattice-Matched Si/III-V-N/Si Heterostructure

Monolithic integration of a one-bit counter circuit with a light-emitting diode as an optical output was fabricated in a structural defect-free Si/III-V-N/Si heterostructure. The generation of structural defects was well suppressed by the simultaneous use of an initial thin GaP intermediate layer and the III-V-N active layer lattice-matched to Si. The origin of relatively high residual carrier concentration was attributed to the accumulated P atoms in the Si growth chamber from sample holder. The carrier concentration of 0.8 - 1.2 × 10¹⁷cm^-3 was achieved by increasing the Si-growth temperature. The one-bit counter OEIC composed of p-type metal oxide semiconductor field effect transistors (p-MOSFETs) and light-emitting diodes (LEDs) was fabricated in Si-capping layer and the embedded III-V-N layer, respectively. This one-bit counter circuit output one pulse every two input pulses, indicating its normal operation. The red light emission from the LEDs synchronized with the logical values of input and output voltages. These results imply that Si-based digital circuits and III-V-N based LEDs can be monolithically integrated in a single chip.