DocumentCode :
2820158
Title :
A variable-length FFT processor for 4×4 MIMO-OFDM systems
Author :
Hung, Chian-Chang ; Chiu, Po-Lin ; Huang, Yuan-Hao
Author_Institution :
Dept. of Electr. Eng., Nat. Tsing-Hua Univ., Hsinchu, Taiwan
fYear :
2010
fDate :
26-29 April 2010
Firstpage :
156
Lastpage :
159
Abstract :
In this paper, we present a 128~2048-point variable-length FFT processor for 4 × 4 MIMO-OFDM systems. In general, we must use n FFT processors for the n × n MIMO-OFDM system, and only 1/r operation time is employed for radix-r pipeline butterfly processor. This increases hardware cost and reduces hardware efficiency in VLSI implementation. Therefore, we propose radix-42 algorithm to deal with four data sequences simultaneously and a butterfly sharing technique to improve the hardware utilization. The design and implementation results show that the proposed FFT processor can achieve 83.3MHz frequency with 3.19mm2 core area using a standard 90nm technology.
Keywords :
MIMO communication; OFDM modulation; digital arithmetic; fast Fourier transforms; integrated circuit design; variable length codes; MIMO-OFDM systems; VLSI implementation; radix-r pipeline butterfly processor; variable-length FFT processor; Computational complexity; Computer architecture; Costs; Data engineering; Feedback; Hardware; MIMO; OFDM; Throughput; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design Automation and Test (VLSI-DAT), 2010 International Symposium on
Conference_Location :
Hsin Chu
Print_ISBN :
978-1-4244-5269-9
Electronic_ISBN :
978-1-4244-5271-2
Type :
conf
DOI :
10.1109/VDAT.2010.5496714
Filename :
5496714
Link To Document :
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