DocumentCode
2820308
Title
Implementation of histogram based sampling algorithm within an EDA scheme with CUDA
Author
Tsutsui, Shigeyoshi ; Fujimoto, Noriyuki
Author_Institution
Dept. of Manage. & Inf. Sci., Hannan Univ., Matsubara, Japan
fYear
2012
fDate
10-15 June 2012
Firstpage
1
Lastpage
8
Abstract
In this paper, we describe an implementation of Node Histogram Sampling Algorithm (NHBSA) on GPUs with CUDA and apply the algorithm to solve large scale QAP instances. To solve large scale QAP instances, we combined the taboo search with NHBSA. In this implementation, we used an efficient thread assignment method, Move-Cost Adjusted Thread Assignment (MATA), which is proposed in a previous study. Through these experiments, we show that MATA plays an important role for efficient parallel computation in NHBSA. We also show the effectiveness of running NHBSA on multiple GPUs using the island model in independent run mode.
Keywords
graphics processing units; parallel architectures; sampling methods; statistical distributions; CUDA; EDA scheme; GPU; MATA; NHBSA; estimation-of-distribution algorithms; histogram based sampling algorithm; large scale QAP instances; move-cost adjusted thread assignment; node histogram sampling algorithm; parallel computation; taboo search; thread assignment method; Evolutionary computation; Graphics processing unit; Histograms; Instruction sets; Kernel; Optimization; Subspace constraints;
fLanguage
English
Publisher
ieee
Conference_Titel
Evolutionary Computation (CEC), 2012 IEEE Congress on
Conference_Location
Brisbane, QLD
Print_ISBN
978-1-4673-1510-4
Electronic_ISBN
978-1-4673-1508-1
Type
conf
DOI
10.1109/CEC.2012.6256444
Filename
6256444
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