• DocumentCode
    2820429
  • Title

    A BU-based rate control design for H.264 and AVS video coding with ROI support

  • Author

    Wu, Ping-Tsung ; Chang, Tzu-Chun ; Su, Ching-Lung ; Guo, Jiun-In

  • Author_Institution
    Dept. of Comput. Sci. & Inf. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan
  • fYear
    2010
  • fDate
    26-29 April 2010
  • Firstpage
    215
  • Lastpage
    218
  • Abstract
    Rate control (RC) techniques play an important role for interactive video coding applications, especially in video streaming applications with bandwidth constraints. In this paper we propose a new BU-level rate control algorithm with ROI support and the associated architecture for H.264 and AVS by exploiting a new predictor model to predict the MAD value and target bits for hardware realization. The proposed algorithm breaks up the sequential processing dependence in the original H.264/AVS RC algorithm and reduces up to 80.6% of internal buffer size for D1 video encoding, while maintaining good video quality.
  • Keywords
    audio-visual systems; encoding; interactive video; sequential codes; video coding; video streaming; AVS video coding; BU-based rate control design; D1 video encoding; H.264; MAD value; ROI support; bandwidth constraints; hardware realization; interactive video coding applications; internal buffer size; region-of-interest; sequential processing; target bits; video quality; video streaming applications; Bit rate; Control design; Encoding; Hardware; PSNR; Quadratic programming; Streaming media; Video coding; Video compression; Video sharing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design Automation and Test (VLSI-DAT), 2010 International Symposium on
  • Conference_Location
    Hsin Chu
  • Print_ISBN
    978-1-4244-5269-9
  • Electronic_ISBN
    978-1-4244-5271-2
  • Type

    conf

  • DOI
    10.1109/VDAT.2010.5496728
  • Filename
    5496728