A robust linear triangle wave generator for ADC testing

This work presents a design to generate robust linear triangle wave for high resolution ADC testing. The proposed method enhances the linearity of test stimulus by an adaptive feedback architecture compensating the linearity drift caused by parasitic effects of fabrication process. The current-mode building blocks reduce the sensitivity in noisy environment and bring the performance of more highly precise operation as well. The furthermore use of off-chip filter structure also enables extremely effective domination over parasitic effects that makes adjustment of operation frequency easily and accurately. The simulation results show that the proposed design is able to generate an accurate test stimulus. Under the generation of 14KHz triangle waveform, its resolution reaches 15 bits with differential nonlinearity (DNL) and integral nonlinearity (INL) are ±0.26LSB and ±0.36LSB respectively.