Title :
Self-Calibrate two-step digital setup/hold time measurement
Author :
Zhihong, Luo ; Yihao, Zhang ; Law, Henry
Author_Institution :
Design Enablement, Global Foundries, Singapore, Singapore
Abstract :
Generally, setup time and hold time are very small timing parameters for a synchronous circuit. It is very hard to accurately measure them directly by a tester from a chip outside. A novel on-chip circuit is designed to assist accurately measuring the synchronous circuit´s setup/hold time. Two-step digital skew adjustment, in-field self-calibration, specially designed balanced MUX cell, path-exchange measurement test method make it possible for this measuring circuit to achieve very high resolution, with the test result which is not affected by process variation, offset path skew, etc. Using the new test circuit and the new test method, we can separately test a synchronous circuit´s setup time and hold time in the range of -0.6~0.6ns, and can achieve stable and high resolution of around 3ps (Global Foundries 65G process).
Keywords :
SRAM chips; calibration; integrated circuit testing; time measurement; timing; designed balanced MUX cell; hold time measurement; in-field self-calibration; offset path skew; on-chip circuit; path-exchange measurement test; process variation; self-calibrate two-step digital setup; setup time; synchronous circuit; test circuit; timing parameters; two-step digital skew adjustment; Automatic testing; Circuit testing; Clocks; Delay effects; Foundries; Random access memory; Semiconductor device measurement; Switches; Time measurement; Timing;
Conference_Titel :
VLSI Design Automation and Test (VLSI-DAT), 2010 International Symposium on
Conference_Location :
Hsin Chu
Print_ISBN :
978-1-4244-5269-9
Electronic_ISBN :
978-1-4244-5271-2
DOI :
10.1109/VDAT.2010.5496732