DocumentCode :
2820702
Title :
A temperature-aware global router
Author :
Lee, Yu-Ting ; Chang, Yen-Jung ; Ting-Chi Wang
Author_Institution :
Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear :
2010
fDate :
26-29 April 2010
Firstpage :
279
Lastpage :
282
Abstract :
In this paper, we present a temperature-aware global router that considers the reliability of interconnects by improving a state-of-the-art global router, NTHU-Route 2.0, with the following enhancements: (1) a temperature-aware L-shaped routing method employed during initial routing, (2) two temperature-aware cost functions employed during rip-up and reroute, and (3) three implementation techniques for memory reduction. The experimental results show that under two different types of thermal profiles our router solves 12 of 16 ISPD08 benchmarks without causing any overflow, which is as good as NTHU-Route 2.0. For the other 4 benchmarks, our router can generate results with comparable overflows. Furthermore, our router significantly reduces the number of net segments located in hot spots and thus enhances the chip reliability. Finally, our router averagely reduces 45% memory usage of NTHU-Route 2.0.
Keywords :
VLSI; integrated circuit interconnections; integrated circuit reliability; network routing; ISPD08 benchmarks; L-shaped routing; NTHU-Route 2.0; chip reliability; interconnect reliability; memory reduction; memory usage; temperature-aware global router; thermal profiles; Computer science; Cost function; Delay; Integrated circuit interconnections; Pins; Routing; Temperature; Tiles; Transistors; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design Automation and Test (VLSI-DAT), 2010 International Symposium on
Conference_Location :
Hsin Chu
Print_ISBN :
978-1-4244-5269-9
Electronic_ISBN :
978-1-4244-5271-2
Type :
conf
DOI :
10.1109/VDAT.2010.5496743
Filename :
5496743
Link To Document :
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