A DC-isolated fine-controlled neural stimulator

This paper presents a neural stimulator ASIC suitable for tripolar FES stimulation which usually requires large stimulus current in fine resolution. An 8-bit current generator circuit with better linearity (output vs. input) across the whole input range and with small silicon area requirement is presented. Thanks to the high-frequency current-switching (HFCS) technique, the small on-chip blocking capacitors isolate the stimulating electrodes and neural tissue from dangerous direct voltages, such as the power supplies. The design of the HFCS stage requires careful consideration and optimized layout pattern in order to minimize current leakage to the substrate. In our design, an operational transconductance amplifier is used as a buffer to track the voltage on the blocking capacitor, reducing the current loss to less than 4% for the targeted applications. The current loss could be further minimized by using a more advanced technology with higher capacitance density and smaller parasitic capacitors. The ASIC was implemented in a 0.6-μm silicon-on-insulator CMOS process, operates from a single 12V power supply, and occupies an area of 4mm².