The fabrication of electrical linewidth structures capable of TEM measurement using standard ⟨100⟩ wafers

Author

Munro, C.G. ; Gundlach, A.M. ; Stevenson, J.T.M. ; Travis, D.W. ; Smith, S. ; Rankin, N.S. ; Walton, A.J.

Author_Institution

Dept. of Electr. Eng., Edinburgh Univ., UK

fYear

1999

fDate

1999

Firstpage

13

Lastpage

17

Abstract

This paper presents details of a process for fabricating electrical linewidth structures over etched windows so that they potentially can be inspected with a TEM. These ELISTEMs (electrical linewidth structures for TEM) are fabricated using standard ⟨100⟩ silicon wafers. Measurements are compared with those obtained for conventional linewidth structures

Keywords

elemental semiconductors; etching; inspection; integrated circuit interconnections; integrated circuit measurement; integrated circuit testing; silicon; transmission electron microscopy; ELISTEMs; Si; TEM inspection; TEM measurement; electrical linewidth structure fabrication; electrical linewidth structures; electrical linewidth structures for TEM; etched windows; linewidth structures; measurements; standard ⟨100⟩ silicon wafers; standard Si⟨100⟩ wafers; Aluminum; Buildings; Costs; Dry etching; Electric variables measurement; Fabrication; Measurement standards; Resists; Silicon; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 1999. ICMTS 1999. Proceedings of the 1999 International Conference on

Conference_Location

Goteborg

Print_ISBN

0-7803-5270-X

Type

conf

DOI

10.1109/ICMTS.1999.766208

Filename

766208