DocumentCode :
2821274
Title :
A sub-3dB NF voltage-sampling front-end with +18dBm IIP3 and +2dBm blocker compression point
Author :
Borremans, J. ; Mandal, G. ; Debaillie, B. ; Giannini, V. ; Craninckx, J.
Author_Institution :
IMEC, Leuven, Belgium
fYear :
2010
fDate :
14-16 Sept. 2010
Firstpage :
402
Lastpage :
405
Abstract :
A highly-linear 400MHz-3GHz RF front-end is presented. At full gain of 16dB, the 2V LNA and passive mixer boosts 1dB out-of-band blocker compression up to +2dBm, and obtains an untuned, uncalibrated out-of-band IIP3 of +18dBm and IIP2 of +61dBm. A NF of less than 3dB is achieved for just 6.5mA front-end current consumption (excluding LO generation) at an area of 0.08mm2 in 90nm digital CMOS. This front-end therefore paves the way to relaxing the antenna filter requirements.
Keywords :
CMOS digital integrated circuits; UHF antennas; UHF filters; UHF mixers; low noise amplifiers; LNA; antenna filter requirements; blocker compression point; current 6.5 mA; digital CMOS; frequency 400 MHz to 3 GHz; front-end current consumption; out-of-band blocker compression; passive mixer; size 90 nm; voltage 2 V; voltage-sampling RF front-end; Filtering; Impedance; Linearity; Mixers; Noise measurement; Radio frequency; Receivers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ESSCIRC, 2010 Proceedings of the
Conference_Location :
Seville
ISSN :
1930-8833
Print_ISBN :
978-1-4244-6662-7
Type :
conf
DOI :
10.1109/ESSCIRC.2010.5619728
Filename :
5619728
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2821274
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