Title :
Measurement of N-well sheet resistance under p+ diffusion and p channel gate
Author :
Ashton, Robert A.
Author_Institution :
Lucent Technol., AT&T Bell Labs., Orlando, FL, USA
Abstract :
Van der Pauw test structures for the measurement of N-well sheet resistance under p+ diffusion and under p channel gate for CMOS technologies on p substrates are presented
Keywords :
CMOS integrated circuits; diffusion; doping profiles; electric resistance measurement; integrated circuit measurement; CMOS technologies; N-well sheet resistance; N-well sheet resistance measurement; Van der Pauw test structures; p channel gate; p substrates; p+ diffusion; CMOS technology; Doping profiles; Electrical resistance measurement; Implants; Integrated circuit measurements; Shape measurement; Size measurement; Surface resistance; Thickness measurement; Voltage;
Conference_Titel :
Microelectronic Test Structures, 1999. ICMTS 1999. Proceedings of the 1999 International Conference on
Conference_Location :
Goteborg
Print_ISBN :
0-7803-5270-X
DOI :
10.1109/ICMTS.1999.766214
