Title :
Measurement of VT and Leff using MOSFET gate-substrate capacitance
Author :
Lau, MM ; Chian, C. YT ; Yeow, YT ; Yao, ZQ
Author_Institution :
Dept. of Comput. Sci. & Electr. Eng., Queensland Univ., Brisbane, Qld., Australia
Abstract :
This paper describes and demonstrates new methods for the measurement of MOSFET threshold voltage and effective channel length using gate-to-substrate capacitance Cgb. The measurement does not require DC drain current flowing between drain and source and thus eliminate the effect of source and drain resistances and the presence of an asymmetric potential profile between source and drain
Keywords :
MOSFET; capacitance; electric resistance; semiconductor device measurement; semiconductor device models; voltage measurement; DC drain current flow; MOSFET effective channel length measurement; MOSFET gate-substrate capacitance; MOSFET threshold voltage measurement; asymmetric source-drain potential profile; drain resistance effects; gate-to-substrate capacitance; source resistance effects; Capacitance measurement; Current measurement; Data mining; Electrical resistance measurement; Fluid flow measurement; MOS capacitors; MOSFET circuits; Medical simulation; Semiconductor device measurement; Transconductance;
Conference_Titel :
Microelectronic Test Structures, 1999. ICMTS 1999. Proceedings of the 1999 International Conference on
Conference_Location :
Goteborg
Print_ISBN :
0-7803-5270-X
DOI :
10.1109/ICMTS.1999.766234
