Title :
Design of ternary D latch using carbon nanotube field effect transistors
Author :
Jimmy, Sutaria ; Narkhede, Satish
Author_Institution :
Dept. of VLSI & Embedded Syst. Design, PG Sch., GTU, Ahmedabad, India
Abstract :
This paper presents a novel design of ternary D-latch using carbon nanotube field effect transistors. Ternary logic is a promising alternative to the conventional binary logic design technique, since it is possible to accomplish simplicity and energy efficiency in modern digital design due to the reduced circuit overhead such as interconnects and chip area. In this paper novel design of D-latch for ternary logic based on CNTFET, using only basic gates STI, NTI, NOR, NAND and transmission gate, is proposed.
Keywords :
carbon nanotube field effect transistors; flip-flops; integrated circuit interconnections; ternary logic; NAND; NOR; NTI; STI; binary logic design technique; carbon nanotube field effect transistor; chip area; circuit interconnect; circuit overhead; ternary D latch; ternary logic; transmission gate; CNTFETs; Carbon nanotubes; Inverters; Latches; Logic gates; Multivalued logic; Threshold voltage; Carbon nanotube (CNT) FET (CNTFET); Multiple Valued Logic(MVL) design; NTI; STI; Ternary lgic; Transmission gate; latch design;
Conference_Titel :
Electronics and Communication Systems (ICECS), 2015 2nd International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-7224-1
DOI :
10.1109/ECS.2015.7124839
