DocumentCode
2821837
Title
On the design of a multiprocessor architecture for neural network simulation
Author
Cavalieri, S. ; Di Stefano, A. ; Mirabella, O. ; Reitano, G.
Author_Institution
Istituto di Informatica e Telecomunicazioni, Catania Univ., Italy
fYear
1991
fDate
11-14 Jun 1991
Firstpage
2538
Abstract
Criteria are outlined for sizing the memory in a parallel architecture for NN (neural networks) simulation. Although a particular topology and a certain learning algorithm are considered, the design guidelines illustrated can be seen as being generally valid. The performance parameters qualifying an NN simulator are mainly speed and its capacity to represent networks of extended size. It is shown that both parameters affect the field of application and the sizing of the memory of each processing element. Guidelines are presented for a trade-off between network size and the amount of memory necessary for each CPU, pointing out the implementational limits which are created when the system grows in size
Keywords
content-addressable storage; digital simulation; learning systems; neural nets; parallel architectures; CPU; capacity; learning algorithm; memory sizing; multiprocessor architecture; neural network simulation; parallel architecture; performance parameters; speed; topology; Analytical models; Broadcasting; Guidelines; Hardware; Neural networks; Neurons; Nonhomogeneous media; Slabs; Telecommunications; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN
0-7803-0050-5
Type
conf
DOI
10.1109/ISCAS.1991.176044
Filename
176044
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