Implementation of statistical characterisation and design techniques for an industrial 0.5 μm CMOS technology

Author

Healy, Sharon ; Horan, Edel ; McCarthy, Kevin ; Mathewson, Alan ; Ning, Zhenqiu ; Rombouts, Erik ; Vanderbauwhede, Wim ; Tack, Marnix

Author_Institution

Nat. Microelectron. Res. Centre, Cork, Ireland

fYear

1999

fDate

1999

Firstpage

227

Lastpage

232

Abstract

This paper presents a methodology for statistical worst-case simulation using the BSIM3v3 model within commercially available tools. Statistical techniques such as principal component analysis and Box-Behnken designs are used to generate a subset of models which reflect the variation of measured device performance. These worst-case corners can be used in circuit simulation to account for the effects of statistical fluctuation on circuit performance. An indication of key process parameters that need to be monitored and controlled is also provided

Keywords

CMOS integrated circuits; circuit CAD; circuit simulation; integrated circuit modelling; integrated circuit reliability; principal component analysis; statistical analysis; 0.5 micron; BSIM3v3 model; Box-Behnken designs; circuit performance; circuit simulation; design tools; device performance variation; industrial CMOS technology; principal component analysis; process parameter control; process parameter monitoring; process parameters; statistical characterisation techniques; statistical design techniques; statistical fluctuation; statistical techniques; statistical worst-case simulation methodology; CMOS process; CMOS technology; Circuit simulation; Data mining; MOS devices; Microelectronics; Parameter extraction; Performance analysis; Semiconductor device modeling; Tellurium;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 1999. ICMTS 1999. Proceedings of the 1999 International Conference on

Conference_Location

Goteborg

Print_ISBN

0-7803-5270-X

Type

conf

DOI

10.1109/ICMTS.1999.766249

Filename

766249