Title :
Efficient real time hardware co-simulation for image enhancement applications
Author :
Nelakuditi, Usha Rani ; Babu, M. Naresh ; Bhagirath, T. Narayana
Author_Institution :
Dept. of ECE, Vignan´s Univ., Vadlamudi, India
Abstract :
Image enhancement techniques improve the visibility of the images. Enhancement results, the output image is more suitable for a specific application rather than input image. It is used in many image processing applications like medical imaging, SONAR and RADAR as a preprocessing step. Hence this paper presents the hardware co-simulation and implementation of image enhancement algorithms into FPGA. Recent improvements in synthesis tools for Simulink suggest a feasible high-level approach to algorithm implementation for embedded DSP systems. The proposed work gives the implementation of efficient edge detection, negative image and image thresholding on Field Programmable Gate Array (FPGA) using Matlab and Simulink.
Keywords :
field programmable gate arrays; image enhancement; logic simulation; FPGA; Matlab; RADAR; SONAR; Simulink; edge detection; embedded DSP systems; field programmable gate array; image enhancement applications; image enhancement techniques; image processing applications; image thresholding; image visibility; medical imaging; negative image; real time hardware co-simulation; synthesis tools; Field programmable gate arrays; Generators; Hardware; Image edge detection; Signal processing algorithms; Software packages; FPGA; Image Processing; MatLab; Simulink; Xilinx System Generator; enhancement;
Conference_Titel :
Electronics and Communication Systems (ICECS), 2015 2nd International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-7224-1
DOI :
10.1109/ECS.2015.7124853