DocumentCode
2822109
Title
FDSOI: From substrate to devices and circuit applications
Author
Mazuré, Carlos ; Ferrant, Richard ; Nguyen, Bich-yen ; Schwarzenbach, Walter ; Moulin, Cécile
Author_Institution
SOITEC, Crolles, France
fYear
2010
fDate
14-16 Sept. 2010
Firstpage
45
Lastpage
51
Abstract
Nanotechnology starts at the substrate level. The SOI substrates enable performance improvement, area saving and power reduction for ICs through a convolution of substrate design and device architecture to maximize the benefits at the IC level. SOI substrates have made possible an efficient PDSOI MOSFET optimization increasing current drive while minimizing leakage and reducing parasitic elements. Further development of the SOI substrate technology has made possible to position ultra thin silicon SOI (UTSOI) as an industrial option for the manufacturing of FDSOI device architectures where the SOI film thickness uniformities is controlled below +5Å across the wafer and wafer to wafer. FDSOI enables the design for low power and high performance IC products. FDSOI circuit design does not have to take into consideration the history effect of PDSOI nor the high threshold voltage variation due to random dopant fluctuation given that the transistor channels are undoped. This makes the porting of designs from bulk to FDSOI much simpler. An overview of the advances in Smart Cut UTSOI and FDSOI devices and circuit applications will be given.
Keywords
MOSFET; nanoelectronics; silicon-on-insulator; substrates; FDSOI device architecture; PDSOI MOSFET optimization; SOI substrates; circuit applications; nanotechnology; random dopant fluctuation; substrate design; transistor channels; ultra thin silicon SOI; Logic gates; Random access memory; Silicon; Substrates; System-on-a-chip; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
ESSCIRC, 2010 Proceedings of the
Conference_Location
Seville
ISSN
1930-8833
Print_ISBN
978-1-4244-6662-7
Type
conf
DOI
10.1109/ESSCIRC.2010.5619767
Filename
5619767
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