A comparison of gate array and logic-cell array implementations of digital ASICs

Logic-cell arrays (LCAs) have been promoted as an alternative to traditional semi-custom gate arrays for the implementation of digital circuits. Being field-programmable devices, they provide advantages in speed of development and ease of change and the potential for reconfiguration in adaptive or time-varying applications. However, since their configuration data is stored in volatile memory they run the risk of corruption and require to be configured whenever power is applied. The 2064 LCA provides a nominal capacity of 1200 user gates and thus may be considered roughly equivalent in logic capacity to the Micro-Circuit Engineering (MCE) gate array of 1440 gates. They could be considered for applications of similar complexity. A design which had been used for a student exercise in gate array design (using the MCE 1440 array) was targetted to the 2064 LCA. Whereas the gate array design used 8-bit wide devices, only 4-bit wide devices could be used with this LCA. This paper describes details of the design and analyses some reasons for the discrepancy between their capabilities