DocumentCode
2823518
Title
On the family of inherently nonslicible floorplans in VLSI layout design
Author
Sur-Kolay, Susmita ; Bhattacharya, Bhargab B.
Author_Institution
Electron. Unit, Indian Stat. Inst., Calcutta, India
fYear
1991
fDate
11-14 Jun 1991
Firstpage
2850
Abstract
A report is presented on a family of infinite number of non-isomorphic inherently nonslicible floorplans along with their salient graph-theoretic properties which lead to certain necessary and sufficient conditions for inherent nonslicibility. An interactive tool for analyzing a nonslicing and converting it to an equivalent slicing, if one exists, is also described
Keywords
VLSI; circuit layout; graph theory; VLSI layout design; graph-theoretic properties; inherently nonslicible floorplans; interactive tool; Circuit topology; Design automation; Integrated circuit interconnections; Integrated circuit layout; Operations research; Polynomials; Software tools; Sufficient conditions; Very large scale integration; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN
0-7803-0050-5
Type
conf
DOI
10.1109/ISCAS.1991.176138
Filename
176138
Link To Document