DocumentCode :
2823542
Title :
Induction motor fed from multilevel inverter topology incorporating selective harmonic reduction
Author :
Pradeep, R. ; Jaseerali, E.Y.
Author_Institution :
Dept. of EEE, Vishwa Vidyapeetham Eng. Coll., Perinthalmanna, India
fYear :
2015
fDate :
26-27 Feb. 2015
Firstpage :
38
Lastpage :
43
Abstract :
All industrial applications are directly or indirectly dependent on induction motor. There would be a high amount of losses in the induction motor due to poor quality of voltage and current that is generated by the normal inverter. As number of levels of the output voltage increase, voltage quality increases. In the paper, multilevel inverter of seven levels which is connected in series sub-multilevel topology is used where the fifth and seventh harmonics have been eliminated, using selective harmonic elimination method. The combination of series sub-multilevel topology and selective harmonic reduction helps in reducing the THD of the output voltage of multilevel inverter which is supplied to the mathematically modelled induction motor as the stator voltage. The performance of induction motor is analysed using simulation in MATLAB SIMULINK.
Keywords :
harmonic distortion; harmonics suppression; induction motors; invertors; network topology; stators; MATLAB SIMULINK; induction motor; multilevel inverter topology; selective harmonic elimination method; selective harmonic reduction; Harmonic analysis; Induction motors; Inverters; Mathematical model; Software packages; Switches; Topology; Induction motor; multilevel inverter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics and Communication Systems (ICECS), 2015 2nd International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-7224-1
Type :
conf
DOI :
10.1109/ECS.2015.7124929
Filename :
7124929
Link To Document :
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