A concurrent L1 and L2-band GPS receiver using an integrated low-IF and Weaver architecture

This work presents an integrated concurrent L1 and L2-band global positioning system (GPS) receiver based on a hybrid architecture that combines the low intermediate-frequency (IF) and Weaver architectures to minimize its hardware complexity. This hybrid architecture uses a part of the Weaver architecture with a low-pass filter, a polyphase filter and a variable gain amplifier to form the low-IF architecture to receive the L1 signals for C/A codes, whereas it uses the Weaver architecture to receive the L2 signals for P codes. The GPS receiver proposed herein was implemented by using the TSMC 0.18-μm 1P6M CMOS technology. It has a chip area of 12.25 mm² and consumes 57 mW at a supply voltage of 1.8 V. The proposed receiver processing L1-band and L2-band signals can yield the noise figures of 4.8dB and 5.4dB, and phase noise @ 1MHz of -127dBc/Hz and -115dBc/Hz, respectively. As compared to conventional GPS receivers, the proposed GPS receiver can obtain L1 and L2 signals simultaneously with the minimized hardware complexity and low power consumption at the similar performances.