• DocumentCode
    2824682
  • Title

    A 1.8µW 1µV-offset capacitively-coupled chopper instrumentation amplifier in 65nm CMOS

  • Author

    Fan, Qinwen ; Sebastiano, Fabio ; Huijsing, Han ; Makinwa, Kofi

  • Author_Institution
    Electron. Instrum. Lab., Delft Univ. of Technol., Delft, Netherlands
  • fYear
    2010
  • fDate
    14-16 Sept. 2010
  • Firstpage
    170
  • Lastpage
    173
  • Abstract
    This paper describes a precision capacitively-coupled chopper instrumentation amplifier (CCIA). It achieves 1μV offset, 134dB CMRR, 120dB PSRR, 0.16% gain accuracy and a noise efficiency factor (NEF) of 3.1, which is more than 3x better than state-of-the-art. It has a rail-to-rail DC common-mode (CM) input range. Furthermore, a positive feedback loop (PFL) is used to boost the input impedance, and a ripple reduction loop (RRL) is used to reduce the ripple associated with chopping. The CCIA occupies only 0.1mm2 in a 65nm CMOS technology. It can operate from a 1V supply, from which it draws only 1.8μA.
  • Keywords
    CMOS integrated circuits; instrumentation amplifiers; CMOS; input impedance; noise efficiency factor; positive feedback loop; precision capacitively-coupled chopper instrumentation amplifier; rail-to-rail DC common-mode input range; ripple reduction loop; size 65 nm; Accuracy; Choppers; Impedance; Instruments; Noise; Resistors; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ESSCIRC, 2010 Proceedings of the
  • Conference_Location
    Seville
  • ISSN
    1930-8833
  • Print_ISBN
    978-1-4244-6662-7
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.2010.5619902
  • Filename
    5619902