• DocumentCode
    2824955
  • Title

    A new method for two-level logic minimization

  • Author

    Mahmoud, Hanan Ahmed Hosni

  • Author_Institution
    Fac. of Eng., Alexandria Univ., Egypt
  • Volume
    3
  • fYear
    2003
  • fDate
    27-30 Dec. 2003
  • Firstpage
    1405
  • Abstract
    This paper presents a new algorithm for two-level logic minimization. The new method is a bottom-up systematic methodology that produces a minimal function. It is especially useful for of logic functions with large number of variables. The complexity of this algorithm is in the order of m log m, where m is the number of minterms in the logic function. Experimental results show that the proposed method produces the minimum cover in almost 99% of the experiments for minimizing logic functions with less than 10 variables. Also, experimental results show that the proposed method produces the minimum cover in almost 83% of the experiments for minimizing logic functions with more than 10 variables. This method can be used in conjunction with the Quine´s theorem to obtain the minimum cover with better time complexity.
  • Keywords
    VLSI; computational complexity; logic circuits; logic design; minimisation; Quine-McCluskey method; VLSI design; bottom-up systematic methodology; logic functions; minimum cover; time complexity; two-level logic minimization; Binary trees; Energy consumption; Heuristic algorithms; Logic circuits; Logic functions; Minimization methods; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2003 IEEE 46th Midwest Symposium on
  • ISSN
    1548-3746
  • Print_ISBN
    0-7803-8294-3
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2003.1562558
  • Filename
    1562558