Yield optimization via trust region and quadratic interpolation algorithm

Fluctuations in manufactured circuit parameters may dramatically reduce the parametric yield. Yield maximization can be formulated as an unconstrained optimization problem. The high expense of yield evaluations, the absence of any gradient information, and the presence of some numerical noise obstruct the traditional derivative-based optimizers. In this paper we present a yield maximization algorithm that consists of a nonderivative unconstrained optimizer coupled with a variance reduction technique. The used optimizer combines trust region mechanism with quadratic interpolation and requires few yield evaluations. The stratified sampling technique is used to develop a lower variance yield estimator that reduces the number of circuit simulations required to reach a desired accuracy level. Numerical and practical circuit examples are used to investigate the proposed algorithm.