Title :
Design of residue generators using threshold logic
Author :
Quintana, Josd M. ; Avedillo, Maria J. ; Pettenghi, Hector
Author_Institution :
Instituto de Microelectron. de Sevilla, Centro Nacional de Microelectron., Sevilla, Spain
Abstract :
A new design for residue generators modulo 3 is presented. It resorts to the potential of the computational model which uses threshold gates to significantly reduce both the complexity and depth of the resulting circuit.
Keywords :
integrated circuit design; logic circuits; residue number systems; threshold logic; computational model; integrated circuit design; residue generators modulo 3; threshold gates; threshold logic; Computational modeling; Counting circuits; Decoding; Digital arithmetic; Digital systems; Electrical fault detection; Encoding; Fault detection; Fault tolerant systems; Logic design;
Conference_Titel :
Circuits and Systems, 2003 IEEE 46th Midwest Symposium on
Print_ISBN :
0-7803-8294-3
DOI :
10.1109/MWSCAS.2003.1562563
