Title :
Bit-level designer´s assistant-a knowledge based approach to systolic processor design
Author :
Sarkar, A. ; Bandyopadhyay, S. ; Jullien, G.A.
Author_Institution :
VLSI Res. Group, Windsor Univ., Ont., Canada
Abstract :
A knowledge-based system for the design of high-performance bit-level systolic arrays in VLSI is described. The design objectives are to give users an extensible system, where tutorial help is available through elaborate explanation facilities and to act as an input specification tool. An expert system shell has been used to create the knowledge base
Keywords :
VLSI; circuit CAD; digital signal processing chips; expert systems; logic CAD; systolic arrays; IKBS; VLSI; bit-level systolic arrays; expert system; knowledge-based system; systolic processor design; Circuits; Digital arithmetic; Digital signal processing; Expert systems; Filters; Knowledge based systems; Process design; Read only memory; Systolic arrays; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1990., Proceedings of the 33rd Midwest Symposium on
Conference_Location :
Calgary, Alta.
Print_ISBN :
0-7803-0081-5
DOI :
10.1109/MWSCAS.1990.140893
