• DocumentCode
    2825446
  • Title

    An evolutionary algorithm for low power VLSI cell placement

  • Author

    Minhas, Mahmood R.

  • Author_Institution
    Dept. of Inf. & Comput. Sci., King Fahd Univ. of Pet. & Minerals, Dhahran, Saudi Arabia
  • Volume
    3
  • fYear
    2003
  • fDate
    27-30 Dec. 2003
  • Firstpage
    1540
  • Abstract
    With the increasing use of battery operated mobile electronic devices, VLSI circuit designers are continuously focusing on approaches to low power designs. The authors presented an evolutionary cell placement technique for low power VLSI standard cell placement. The proposed technique is based on two evolutionary algorithms namely tabu search and genetic algorithm. Experiments were carried out using representative circuits from ISCAS-85/89 benchmark suite. For the comparison purposes, the authors also implemented GA for the problem and compared placements results of the proposed technique to those of GA. The comparison shows that the proposed technique outperforms GA both in terms of quality of final placement solution obtained as well as CPU run time requirements.
  • Keywords
    VLSI; electronic design automation; genetic algorithms; integrated circuit layout; low-power electronics; search problems; evolutionary algorithm; genetic algorithm; low power VLSI cell placement; mobile electronic devices; tabu search; Constraint optimization; Cost function; Design automation; Design optimization; Energy consumption; Evolutionary computation; Integrated circuit interconnections; Process design; Very large scale integration; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2003 IEEE 46th Midwest Symposium on
  • ISSN
    1548-3746
  • Print_ISBN
    0-7803-8294-3
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2003.1562590
  • Filename
    1562590