• DocumentCode
    2825498
  • Title

    Automatic code generation for integrated digital signal processors

  • Author

    Wess, B.

  • Author_Institution
    Inst. fuer Nachrichtentechnik und Hochfrequenztechnik, Tech. Univ. Wien, Austria
  • fYear
    1991
  • fDate
    11-14 Jun 1991
  • Firstpage
    33
  • Abstract
    Novel algorithms for optimizing compilers are discussed which automatically generate efficient instruction code for integrated digital signal processors. Since these processors are primarily used in real-time applications for digital signal processing, the code has to meet high quality requirements. In general, conventional compiler design techniques do not lead to satisfactory results because signal processors and microprocessors are very different in architecture. The algorithms for automatic code generation presented use a very general description of the target machine. They can be applied to a large number of modern integrated digital signal processors. As an example, results of a compiler based on these algorithms generating code for the integrated digital signal processor DSP56000 are presented
  • Keywords
    automatic programming; computerised signal processing; digital signal processing chips; program compilers; DSP56000; automatic code generation; compiler design; compiler optimization; instruction code; integrated digital signal processors; real-time applications; signal flow graphs; Arithmetic; Bandwidth; Digital signal processing; Digital signal processors; Hardware; Optimizing compilers; Registers; Signal generators; Signal processing; Signal processing algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1991., IEEE International Sympoisum on
  • Print_ISBN
    0-7803-0050-5
  • Type

    conf

  • DOI
    10.1109/ISCAS.1991.176266
  • Filename
    176266