DocumentCode
2825591
Title
Comparison of wafer-level spatial IDDQ estimation methods: NNR versus NCR
Author
Sabade, Saga S. ; Walker, D.M.H.
Author_Institution
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
fYear
2004
fDate
38102
Firstpage
17
Lastpage
22
Abstract
Extending the useful life of IDDQ test to deep submicron technologies has been a topic of interest in recent years. IDDQ test loses its effectiveness as the signal to noise ratio degrades due to rising background current and fault-free IDDQ variance. Defect detection using IDDQ test requires separation of deterministic sources of variation from defective current. Several methods that use deterministic variation in IDDQ at the wafer level for estimating fault-free IDDQ of a chip are proposed. This paper compares two such methods: nearest neighbor residual (NNR) and neighbor current ratio (NCR). These methods are evaluated using industrial test data for a recent technology.
Keywords
integrated circuit testing; parameter estimation; IDDQ testing; background current; deep submicron technology; defect detection; defective current; deterministic sources; deterministic variation; fault-free IDDQ estimation; fault-free IDDQ variance; industrial test data; nearest neighbor residual; neighbor current ratio; signal to noise ratio; spatial correlation; wafer-level spatial IDDQ estimation methods; Computer science; Degradation; Equations; Fault diagnosis; Joining processes; Life testing; Logic; Nearest neighbor searches; Signal to noise ratio;
fLanguage
English
Publisher
ieee
Conference_Titel
Current and Defect Based Testing, 2004. DBT 2004. Proceedings. 2004 IEEE International Workshop on
Print_ISBN
0-7803-8950-6
Type
conf
DOI
10.1109/DBT.2004.1408947
Filename
1408947
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